Conventionally, as a substrate for a device, an SOI wafer wherein a silicon active layer (an SOI layer) is formed on a support substrate has been widely utilized. As a method for producing such an SOI wafer, for example, it is known that a bonding method in which two silicon wafers are bonded together via an oxide film. In ion implantation delamination method which is one of bonding methods, an oxide film (an insulator layer) is formed on a surface of a silicon wafer (a bond wafer) to be a silicon active layer or a base wafer to be a support substrate, and an ion-implanted layer is formed inside the bond wafer by implanting ions such as hydrogen from one side surface of the bond wafer. Further, after this bond wafer is bonded to the base wafer via the oxide film, delamination is performed at the ion-implanted layer by heat treatment. Thereby, an SOI wafer in which a thin silicon active layer is formed on the base wafer via the oxide film can be obtained.
Further, there are also some cases that an insulator support substrate is used and a bond wafer is bonded to this directly, i.e., without an oxide film.
In the case of producing an SOI wafer as described above, a silicon wafer on the surface of which micro pit defects with 50 nm or more in size exist has been generally used as a bond wafer. However, in recent years, the demand for thinning the silicon active layer increases, and the demand for quality of a silicon wafer applicable to this has also become strict.
In order to reduce defects in the silicon active layer, there has been proposed the use of an epitaxial layer or a silicon single crystal in so-called a neutral region (N region) where there exist no defects caused during growth of the single crystal which is called grown-in defects such as FPD, LSTD and COP.
For example, there has been proposed a method for producing an SOI wafer by forming an epitaxial layer on a silicon wafer (a bond wafer), implanting boron ions into the epitaxial layer, subsequently bonding the wafer to a support substrate via an oxide film, and further grinding and polishing the back surface of the bond wafer (for example, see Japanese Patent Laid-open (Kokai) No. 10-79498 (on pages 4–6, in FIG. 2)).
However, in the case of using the wafer on which the epitaxial layer is formed as the bond wafer as described above, defects in the SOI layer can be improved, but there has been a problem that the production cost remarkably increases because the process for growing the epitaxial layer increases.
On the other hand, as a bond wafer, in the case of using a silicon wafer grown in N region where no micro defect such as FPD and COP exists, although it is required to accurately control growth conditions of a silicon single crystal, there is an advantage that process for forming the epitaxial layer is not needed.
N region will be explained herein. It is known that in the case of changing a growth rate V from high speed to low speed in the direction of a crystal growth axis in a CZ pulling apparatus with a usual furnace structure (hot zone: HZ) having a large temperature gradient G at the vicinity of a solid-liquid interface in a crystal, a defect distribution diagram as shown in FIG. 9 can be obtained.
In FIG. 9, V region is a region that contains a large amount of vacancies, i.e., depressions, pits, or the like caused by lack of silicon atoms, and I region is a region that contains a large amount of dislocations or clusters of excess silicon atoms caused by existence of excess silicon atoms. It has also been confirmed that there exists a neutral (hereinafter occasionally abbreviated as N) region that contains no (or little) lack or excess of the atom between V region and I region, and defects called OSF (Oxidation Induced Stacking Fault) are distributed in a ring shape (hereinafter occasionally referred to as OSF ring) near a boundary of V region when observed in the cross section perpendicular to a crystal growth axis.
When the growth rate is relatively high, there exist grown-in defects such as FPD, LSTD and COP, which are considered due to voids consisting of agglomerated vacancy-type point defects, at a high density over the entire radial direction of the crystal, and a region containing these defects becomes V region. Further, along with lowering of the growth rate, the OSF ring is generated from the periphery of the crystal. There exist at a low density outside the OSF ring, L/D (Large Dislocation: an abbreviation for interstitial dislocation loop, such as LSEPD, LFPD and the like) defects (huge dislocation clusters) which are considered due to dislocation loops consisting of agglomerated interstitial silicon atoms, and the region where these defects exist becomes I region (occasionally referred to as L/D region). When the growth rate is further lowered, the OSF ring shrinks to the center of the wafer and disappears, so that the entire plane becomes I region.
N region located between the V region and the I region and outside the OSF ring becomes a region containing no FPD, LSTD and COP to be generated due to voids as well as no LSEPD and LFPD to be generated due to interstitial silicon atoms. In addition, it has been recently found that by further classifying N region, as shown in FIG. 9, there exist Nv region (the region where a lot of vacancies exist) adjacent to the outside of OSF ring and Ni region (the region where a lot of interstitial silicon atoms exist) adjacent to I region, and that when performing thermal oxidation treatment, a lot of oxygen precipitates are generated in Nv region and little oxygen precipitates are generated in Ni region.
Although such an N region conventionally existed only in a part of a plane of wafer, a crystal having N region over the entire radial plane (the entire surface of wafer) has been able to be manufactured by controlling V/G that is a ratio of a pulling rate (V) to an axial temperature gradient (G) at a solid-liquid interface.
Also, in the manufacture of an SOI wafer, as described above, there has been proposed a method in which a silicon single crystal wafer having N region over the entire surface is used as a bond wafer.
For example, there has been proposed an SOI wafer wherein a silicon single crystal is pulled by controlling a ratio of the pulling rate V to the axial temperature gradient G at a solid-liquid interface of the crystal (V/G) within a predetermined range when it is pulled by Czochralski method (CZ method), and the silicon wafer in N region is used as a bond wafer (for example, see Japanese Patent Laid-open (Kokai) No. 2001-146498 (on pages 5–8) and Japanese Patent Laid-open (Kokai) No. 2001-44398 (on pages 2–4, in FIG. 1)).
However, when performing oxidation treatment for bonding the bond wafer and the base wafer together and oxidation treatment for adjusting the thickness of an SOI layer, and subsequently cleaning with hydrofluoric acid to remove an oxide film, even if the silicon single crystal grown in N region is used as the bond wafer, there has been the case that a failure such that the SOI layer was almost entirely or partially destroyed could occurred. Especially, the failure as described above often occurs when a thinner SOI layer is formed. Also, in case that making an SOI layer thinner is further required in future, it is apprehended that the SOI layer may be remarkably degraded even if the silicon wafer grown simply in N region as above is used as a bond wafer and in addition, it is also expected that the quality of the insulator oxide film between the SOI layer and the base wafer may be deteriorated.